40 blocks, ready to drop in.
A complete library of licensable peripheral and bus-protocol IP — synthesizable, struct-typed RTL, independently verified with regression gates, and packaged as soft-license kits. Click any block for details and to request its datasheet.
Bus Fabric & Interconnect
Interrupt Architecture
Timers & Clocks
Serial I/O
Automotive Networking
Data Movement & Storage
GPIO & System Glue
Analog Control & Power
Data Integrity & Security
Functional Safety (ISO-26262)
Debug & Verification
Every block, spec'd.
AXI4 / AXI4-Lite bridges
AXI4 and AXI4-Lite protocol bridges for connecting IP across the SoC.
Request datasheet →AHB5 / APB4 bridges
Classic AMBA bridges for peripheral and register buses.
Request datasheet →N×M AXI4 crossbar
Full AXI4 crossbar interconnect with configurable ports.
Request datasheet →Dual-clock CDC
Verified clock-domain-crossing primitives.
Request datasheet →PLIC
RISC-V platform-level interrupt controller for external interrupts.
Request datasheet →CLINT
Core-local interrupt controller — timer and software IPI.
Request datasheet →AIA (APLIC + IMSIC)
Advanced Interrupt Architecture, MSI-based and virtualization-ready.
Request datasheet →General-purpose timer
N-channel timer with prescaler, PWM, 64-bit free-run.
Request datasheet →I3C (MIPI)
MIPI I3C with dynamic addressing, in-band interrupts, legacy I2C.
Request datasheet →CAN 2.0 / CAN-FD
Classic CAN and CAN-FD with bit-stuffing and acceptance filters.
Request datasheet →SENT (J2716)
Sensor receiver with tick calibration and nibble decode.
Request datasheet →Automotive Ethernet + TSN
802.3 MAC with 802.1Qbv/Qav shapers and 1588 PTP timestamp.
Datasheet (PDF) →Multi-channel DMA
Scatter-gather DMA with AXI4 master interface.
Request datasheet →QSPI flash (XIP)
Quad-SPI NOR controller with execute-in-place boot.
Request datasheet →NVMe-over-AXI
On-chip NVMe storage controller with admin and I/O queues.
Request datasheet →SD / eMMC host
CRC-7 command engine, 1/4-bit DAT, multi-block + DMA.
Request datasheet →Inter-core mailbox
N-channel doorbell and message passing with IRQ matrix.
Request datasheet →Motor-control PWM
Complementary outputs with dead-time and fault/brake.
Request datasheet →PVT / temperature sensor
On-die thermal/PVT front-end with WARN/CRIT and over-temp line.
Request datasheet →CRC accelerator
Configurable CRC/checksum, Williams-model, golden-vector verified.
Request datasheet →eFuse / OTP
One-time-programmable fuse array with read-lock key storage.
Request datasheet →HSM-lite crypto island
SHA-256, AES-128 CBC/CTR, TRNG, key ladder from eFuse root.
Request datasheet →Safety aggregator / FCCU
Fault hub with per-source reaction and runtime self-test.
Request datasheet →SecOC / AES-CMAC
AUTOSAR SecOC frame authenticate/verify with replay rejection.
Request datasheet →ECC + lockstep safety-glue
Hsiao SECDED ECC and delayed-lockstep comparator.
Request datasheet →Challenge-response watchdog
Q&A windowed watchdog that catches a stuck-but-running CPU.
Request datasheet →AUTOSAR E2E protection
CRC + counter + Data-ID to detect corruption/loss/masquerade.
Request datasheet →Position decoder
Quadrature encoder and resolver-to-digital (CORDIC).
Request datasheet →JTAG TAP / debug module
Full RISC-V JTAG→DTM→DM chain, halt/resume, abstract access.
Request datasheet →FORTH debug co-processor
J1-style co-processor to monitor and field-patch live designs.
Datasheet (PDF) →CSR-sim kit
YAML CSR-def → C firmware → ISS → live CSR/LED visualization.
Datasheet (PDF) →Need the full kit, or the whole subsystem connected through the NoC? Get in touch.
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