Accelerators & SoCs
Transformer/LLM Inference Accelerator
Purpose-built for transformer and LLM inference: systolic compute units with a fused attention engine, high-bandwidth memory, and an MLIR compiler stack so your models map cleanly to the hardware.
Datapath
Compute and attention, fused.
Features
Attention, in hardware.
Compute
Systolic GCUs
64×64 systolic arrays with a fused attention engine for transformer workloads.
Memory
HBM3 @ 2 TB/s
On-package SRAM plus HBM3 to keep the arrays fed.
Software
MLIR compiler
FP8 / BF16 / INT8 — models lowered through an MLIR stack.